Low Power Design
 
 

     Download a printable version of the page <course.pdf>

  Lecturer: Dr. Somayeh Timarchi

 
   
  Descriptions
   

This course covers the concepts of Low Power Digital Circuit Design.

 
   

References
   
[1] Piguet, Low power CMOS circuits, technology, logic design and CAD tools, CRC, 2006. (440 pages)
[2] Keating, M., Flynn, D., Aitken, R., Gibbons, A., Shi, K., Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems), 2007, Synopsys.
[3] J. M. Rabaey, Low Power Design Essentials (Integrated Circuits and Systems), Springer, 2009.
[4] J. M. Rabaey, A. Chandrakasan, and B. Nikolić, Digital Integrated Circuits, A Design Perspective, Second Edition, Prentice-Hall, 2003.
[5] A. Wang, et al., Sub-threshold Design for Ultra Low-Power Systems, Springer 2006.
[6] Vojin G. Oklobdzija, VLSI Arithmetic Course, Electrical and Computer Engineering Department, University of California Davis
[7] A. Chandrakasan and R.W. Brodersen, Low-Power CMOS Design, IEEE-Wiley, 1998. (644 pages)
[8] Some related papers…

 
   

Grading
   

  • Class and assignments

  • Project

  • Midterm

  • Final exam
   

Outline
   

 

Session

Subject
Session 1 Introduction and motivation
Session 2 Introduction and motivation
Session 3 clock gating
Session 4 clock gating
Session 5 Operand Isolation - Multi_VDD - Voltage Scaling
Session 6 Voltage Level Shifter
Session 7 Voltage Level Shifter - Multi-VDD
Session 8 Dual threshold technique - Power Gating
Session 9 Gate-Level LPD
Session 10 Gate-Level LPD
Session 11 Gate-Level LPD
Session 12 Pre-computation - Pipelining
Session 13 Parallelism - Redundancy & Concurrency - FSM
Session 14 FSM
Session 15 Residue Number System
Session 16 Residue Number System
Session 17 Synopsys Design Compiler
   
   

 
  Assignments
 
 

Scores

  • Midterm & Homework
  • Final

This site was last updated 04/16/15

 
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