Dr. Jaberipur’s research interests includes Computer Arithmetic and Compiler Construction. Besides the research projects carried out in Shahid Beheshti University (listed below), he is also affiliated to IPM School of Computer Science as a part time researcher.
Design and
implementation of modulo 2n±1 adder with
stored representation of residues, 2008
Improving the Efficiency
of Syntax-Graph
Driven Parsers, Shahid Beheshti University, 2006
Development of Asserted
Shift-Reduce Grammars and Parser Generators,
Designing an FFT
Co-processor with Deferred Multiplications,
Design and
Implementation of a Syntax Graph Parser Generator,
Development of the
Theory of Syntax-Graph Driven Parsers,
A Generalization of
Carry Save Adders for Higher Radix Multi-Operand Addition,
Confidential technical report, Ref. # 1976, Iran
Telecommunication Research Centre, 1985.